CORE-ET Silicon Platform (ETSP)

CORE-ETSP provides a platform for running fast and low-power AI inference workloads at the edge.

In-scope :

Many-core 64-bit (with vector/SIMD extensions) low-power CPU design including NoC and on-chip MRAM
Multiple interfaces for use both as an accelerator board, and as a stand-alone system
Reference Designs
A full-featured emulator that allows rapid evolution of the architecture
Development platform for building and running inference frameworks
Comprehensive set of tools for porting existing frameworks
Documentation for all layers

Basics

Repositories

Repository	Commits	Reviews	Issues

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See the project’s PMI page at https://projects.eclipse.org/projects/openhw.core-etsp

Releases

Reviews

Creation (2026-03-04) – see review

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